Keynotes

Invited Speakers

Dr. Jim Vickers

Recent advances in electron-beam probing for electrical failure analysis of active integrated circuits

Thermofisher Scientific, USA

Electron-beam probing of active integrated circuitry has undergone a resurgence in the past few years due to the nanometer-scale imaging resolution afforded by scanning electron microscopes.
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Dr. Michael Khazhinsky

ESD and Latch-up Design Verification Challenges in Packaged Parts and Modules

Silicon Labs, USA

ESD and latch-up stress testing to meet industry JEDEC and ESDA standards is performed on packaged parts and modules. However, ESD and latch-up design verification has been historically done on die / Silicon database.
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Dr. Sebastian Brand

Advances in high-resolution non-destructive defect detection and localization enhanced by intelligent signal processing

Fraunhofer IWMS, Germany

Non-destructive inspection and analysis techniques are crucial for quality assessment and defect analysis in various industries.
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Dr. Shahin Tajik

Security Evaluation, Designing Tamper Detection and Protection Mechanisms for Electronic Systems

Worcester Polytechnic Institute, USA

Electronic computing hardware forms the foundation of our information systems and cyberinfrastructure. The threats to the physical security of computer chips and countermeasures have been widely researched. Read More..

Dr. Shivam Bhasin

Infiltrating the Edge: Fault Injection Attacks on Edge-deployed AI

Nanyang Technological University, Singapore

EdgeML on edge devices unlocks powerful AI applications, but faces new threats. This talk explores fault injection attacks on neural networks.
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Dr. Yan Li

The Applications of Simulation and Artificial Intelligence in Advanced Packaging

Samsung Semiconductor Inc., USA

Advanced Packaging techniques, which can assemble multiple chiplet technology nodes with different functions into the same compacted package, can leverage the best available chiplets having smaller die size, thus maximize device performance with much faster product development cycle, lower cost, and higher yield.
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Jayant D’Souza

Increasing chain diagnosis resolution in the age of backside power

Siemens, USA

Scan chain diagnosis has long been used to identify manufacturing defects and yield issues in early ramp. Identifying and eliminating these yield issues quickly and efficiently are required to ensure business success of a product.
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Professor Fei Hui

In-situ observation of reliable nanosynpatic response in low-dimensional materials using CAFM

Zhengzhou University, China

With the shrinking of electronic devices, low-dimensional materials (e.g. 2D h-BN, 1D nanowires, 0D nanoparticles) have been utilized as a switching layer in memristive devices with a metal/insulator/metal structural cell.
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Professor Cristian Zambelli

3D NAND Flash memories reliability: a cross-layer perspective

University of Ferrara, Italy

The 3D NAND Flash memory technology is the main building block of storage architectures such as multimedia cards and Solid State Drives. Applications ranging from mobile to high-performance computing are continuously calling for an increased storage density, requiring massive scaling efforts at the device and array level.
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Professor Enrico Zanoni

Mechanisms of charge capture and emission in power GaN HEMTs

University of Padova, Italy

In the past, Drain Current Transient Spectroscopy and other pulsed techniques were used mostly to evaluate trap activation energy and cross-section. These parameters can be obtained by measuring recovery transients at various temperatures, usually keeping the devices unbiased.
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